台積電徵主管,職缺17項

週五(12/19)參加了太陽光電中心舉行的頒獎典禮。

主辦單位是工研院的太陽光電中心。

立法委員(兩位),以及經濟部能源局的官員,教育部國教司官員,都以貴賓身份到場。

他們說,太陽光電是景氣涼颼颼的現在,仍在徵人的行業。

我當時心想,身為半導體龍頭產業的台積電,人事方面,會是如何冷清呢?

來看了一下,台積電目前公開徵才的有17個職務,都屬於主管職。

列出幾個看一下:

1. 主管類(Manager-Level)
主管類-R&D Device Manager

碩士/博士畢業、電機電子工程相關/物理學相關、8 年以上工作經驗
1. Minimum master degree in Electronics Engineering or Physics field
2. Minimum 5 years of experiences in device technology development
3. Fluent in English

要工作8年以上,其中最好有5年是在做元件技術開發。英文要流利。台積電開會都要英文。

2. 主管類(Manager-Level)
主管類-R&D High K/Metal Gate Manager

碩士/博士畢業、電機電子工程相關/材料工程相關、8 年以上工作經驗
1. Minimum Master degree majoring in EE or material science. Those with higher degree preferred.
2. Strong project management, communications, organization, leadership and interpersonal skills.
3. Must be effectively bilingual in Mandarin and English
4. Must have hands-on experience in Device Integration
5. experience in dealing with integration team and module team a major plus

要讀EE,有High K與金屬閘的實務經驗,要能做專案管理,溝通、組織、領導能力。擁有跟不同團隊打交道的經驗更佳,例如跟整合團隊與模組團隊打交道的經驗。

3. 主管類(Manager-Level)
研發類 – Power/Analog and High Perforamnce deputy director

碩士/博士畢業、電機電子工程相關/物理學相關/材料工程相關、10 年以上工作經驗
1. Ph.D. and/or Master of engineering or Science
2. 15+ years of experience in the Analog segment with proven contribution/results in Analog processes, devices, design kits, or system applications; at least total 20+ working years in IC industry
3. Successful track record in managing technical groups in related industry
4. Thorough understanding of the competitive landscape of the Analog market place
5. Outstanding ability in business decision making, customer interface and negotiation
6. Excellent program management and people management skills
7. Fluent in both English and Mandarin
8. Personality: Integrity and tsmc culture ‘compatible’; Self-driven initiator and innovator; Good EQ and AQ to handle people and work stress or ambiguity; Interpersonal and influence skills to lead and drive results in highly matrix organizations.

這個第八點很有趣,要求人格特質最好是:具有誠信,與台積電文化相容。能夠自動自發。面對工作壓力、挑戰極限,以及與人互動時,要有良好的EQ及AQ。要有內力在高度矩陣式管理機構裡,把成果給擠出來。

4. 主管類(Manager-Level)
研發類– HV ESD Manager
碩士/博士畢業、自然科學學科類/電機電子工程相關、5 年以上工作經驗
1. Minimum master degree in Electronics Engineering, Material Science or Physics field. Those with higher degree preferred.
2. Minimum 5 years of experiences in HV Device technology development
3. Must have hands-on experience in HV Device ESD field
4. Fluent in English
5. Strong project management, communications, organization, leadership and interpersonal skills.

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